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FAILURE RISKS INDUCED BY THE INTERCONNECTION PROCESS USED FOR SEMICONDUCTOR COMPONENTS


BÂZU MARIUS 1, ILIAN VIRGIL EMIL 1, GĂLĂŢEANU LUCIAN 1, VÂRŞESCU DRAGOŞ 1, ILIAN LIVIU MIRCEA 2
1. National Institute for Research and Development in Microtechnologies, IMT-Bucharest, 126A Erou Iancu Nicolae str., 077190 Bucharest, Romania
2. University Politehnica Bucharest, 313 Splaiul Independentei,060042 Bucharest, Romania

Issue:

PLUMEE, Number 1, Volume I

Section:

Issue No. 1 - Volume 3(2013)
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Abstract:

Typical failure mechanisms induced by the interconnection process are shown: electromigration, hillocks & voids, delamination and step coverage. Each failure mechanism is explained starting from the failure mode and going into some details about the basic phenomenon responsible for the failure. The typical failure analysis methods used for investigating each specific failure mechanism are detailed and some possible corrective actions are presented, which are aimed to diminish the failure risk by the described failure mechanisms.

Keywords:

interconnection, failure, metallization, semiconductors, components, reliability.

Code [ID]:

PLUMEE201301V01S01A0007 [0003963]

Full paper:

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