FAILURE RISKS INDUCED BY THE INTERCONNECTION PROCESS USED FOR SEMICONDUCTOR COMPONENTS

Abstract

Typical failure mechanisms induced by the interconnection process are shown: electromigration, hillocks & voids, delamination and step coverage. Each failure mechanism is explained starting from the failure mode and going into some details about the basic phenomenon responsible for the failure. The typical failure analysis methods used for investigating each specific failure mechanism are detailed and some possible corrective actions are presented, which are aimed to diminish the failure risk by the described failure mechanisms.

Cuvinte cheie